1. Field of the Invention
The present invention relates to a radio receiver-transmitter apparatus such as a TDMA (time-division multiple access) communication apparatus equipped with a signal changeover switch such as an SPDT (single-pole-dual-throw) switch which is adapted for selectively changing input and output signals between the apparatus and an antenna.
2. Description of the Related Art
In the TDMA communication apparatus, there is employed an SPDT switch for selectively outputting a radio frequency signal to an antenna or inputting such a signal therefrom. FIG. 1 is a conceptional circuit diagram of an exemplary SPDT switch. As shown, the SPDT switch comprises four units of field-effect transistors (FETs) and has a signal input terminal IN, a signal output terminal OUT and a signal input-output terminal IO.
One end of the 1st FET unit 5 is connected to the signal input terminal IN 2, while the other end thereof is connected to the signal input-output terminal IO 1. One end of the 2nd FET unit 6 is connected to the signal input terminal IN 2, while the other end thereof is grounded. One end of the 3rd FET unit 9 is connected to the signal output terminal OUT 3, while the other end thereof is connected to the signal input-output terminal IO 1. And one end of the 4th FET unit 8 is connected to the signal output terminal OUT 3, while the other end thereof is grounded. These FET units are composed of mutually equivalent field-effect transistors. In this specification, each FET unit signifies a configuration consisting of one or more stages of field-effect transistors. The signal input terminal IN 2 is connected to a transmitter of the communication apparatus, and the signal output terminal OUT 3 is connected to a receiver of the communication apparatus, and the signal input-output terminal IO 1 to the antenna, respectively.
When the SPDT switch is in a transmission mode for outputting a radio frequency signal from the transmitter of the communication apparatus to the antenna, the 1st FET unit 5 and the 4th FET unit 8 in the SPDT switch are turned on, while the 2nd FET unit 6 and the 3rd FET unit 9 are turned off. Therefore the radio frequency signal received at the signal input terminal IN 2 is delivered via the 1st FET unit 5 to the signal input-output terminal IO 1. Meanwhile, when the SPDT switch is in a reception mode for inputting a radio frequency signal from the antenna to the receiver of the communication apparatus, the 3rd FET unit 9 and the 2nd FET unit 6 in the SPDT switch are turned on, while the 4th FET unit 8 and the 1st FET unit 5 are turned off. Therefore the radio frequency signal received at the signal input-output terminal IO 1 is delivered via the 3rd FET unit 9 to the signal output terminal OUT 3.
In the case of a DC signal, satisfactory isolation is attainable if the SPDT switch is composed merely of the 1st FET unit 5 and the 3rd FET unit 9. That is, when the SPDT switch is in the transmission mode, none of leakage current is caused in the 3rd FET unit 9 which is in an off-state. Also when the SPDT switch is in the reception mode, none of leakage current is caused in the 1st FET unit 5 either which is in an off-state. However, since each field-effect transistor has a capacitive component, there arises a problem if the SPDT switch is so constituted as mentioned above for transmitting or receiving an AC signal. That is, even when the 1st FET unit 5 or the 3rd FET unit 9 is in an off-state, an AC signal leaks out from the 1st FET unit 5 or the 3rd FET unit 9 to consequently bring about failure in achieving complete isolation. Accordingly, in transmission or reception of an AC signal, it becomes necessary to lead any leakage of the AC signal to the ground by combining the 2nd FET unit 6 and the 4th FET unit 8 as described above to constitute the SPDT switch.
Generally the gate bias of the field-effect transistor varies depending on the voltage amplitude of an input AC signal. When an AC signal (having a maximum voltage amplitude V.sub.RF) flows in the channel between the source and drain regions of the field-effect transistor under the condition where a DC gate voltage Vg.sub.DC is applied to the gate of the transistor, a gate bias Vg, which is formed of the DC gate voltage Vg.sub.DC and the maximum voltage amplitude V.sub.RF superimposed thereon, is applied between the gate and the channel of the transistor. Consequently the gate bias Vg applied to the gate varies by a maximum of .+-..DELTA.Vg with respect to the gate voltage Vg.sub.DC at the same frequency as that of the AC signal. In the above, .DELTA.Vg denotes the gate voltage variation which is determined by the maximum voltage amplitude V.sub.RF of the AC signal and is equal approximately to k.times.V.sub.RF (where k is a constant smaller than 1). The constant k can be calculated univalently from the time constant, which is determined by the capacitance between the gate and the channel of the field-effect transistor, and the frequency of the AC signal.
At the time of signal transmission when the 1st FET unit 5 and the 4th FET unit 8 are in an on-state while the 2nd FET unit 6 and the 3rd FET unit 9 are in an off-state, normally a radio frequency signal of a high power flows in the SPDT switch. In this case, the gate bias of the field-effect transistor in the 1st FET unit 5 becomes Vg (=VON-.DELTA.Vg) due to the influence of the radio frequency signal flowing in the 1st FET unit 5. Denoted by VON is the DC gate voltage applied to the gate of the field-effect transistor in an on-state. As a result, the source-drain saturation current Idss of the field-effect transistor is reduced. If the current of the radio frequency signal flowing in the 1st FET unit 5 exceeds the source-drain saturation current Idss, the 1st FET unit 5 is rendered incapable of permitting a complete flow of the signal therein, whereby a distortion is generated in the radio frequency signal outputted from the SPDT switch to the antenna, or an insertion loss is caused in the SPDT switch. This phenomenon is graphically shows in FIG. 2. In this diagram, VBI denotes a built-in voltage, and VBR denotes a breakdown voltage.
At the time of signal transmission, if a high voltage having a maximum voltage amplitude V.sub.RF is applied to the source-drain regions of the 2nd FET unit 6 and the 3rd FET unit 9 in an off-state, the gate bias Vg (=VOFF+.DELTA.Vg) of the field-effect transistor in the 2nd FET unit 6 and the 3rd FET unit 9 exceeds the pinch-off voltage V.sub.PS, so that the 2nd FET unit 6 or the 3rd FET unit 9 is turned on, and therefore a distortion is generated in the radio frequency signal outputted from the SPDT switch to the antenna, or some deterioration is caused in the isolation characteristic of the SPDT switch. This phenomenon is graphically shown also in FIG. 2. Denoted by VOFF is a DC gate voltage applied to the gate of the field-effect transistor in an off-state.
If a radio frequency signal of a high power flows in the SPDT at the time of signal reception when the 3rd FET unit 9 and the 2nd FET unit 6 are in an on-state while the 4th FET unit 8 and the 1st FET unit 5 are in an off-state, a phenomenon similar to that of the 1st FET unit 5 during the signal transmission occurs with regard to the field-effect transistor in the 3rd FET unit 9. Consequently the 3rd FET unit 9 is rendered incapable of permitting a complete flow of the signal therein, whereby a distortion is generated in the radio frequency signal outputted from the SPDT switch to the communication apparatus, or an insertion loss is induced in the SPDT switch.
At the time of signal reception, if a high voltage having a maximum amplitude V.sub.RF is applied to the source-drain regions of the 4th FET unit 8 and the 1st FET unit 5 in an off-state, there occurs a phenomenon similar to that of the 2nd FET unit 6 or the 3rd FET unit 9 during the signal transmission. As a result, a distortion is generated in the radio frequency signal outputted from the SPDT switch to the communication apparatus, or some deterioration is caused in the isolation characteristic of the SPDT switch.
In the conventional SPDT switch known heretofore, the 1st, 2nd, 3rd and 4th FET units are composed of mutually equivalent field-effect transistors as shown in FIG. 1. And the transmitting section (1st FET unit 5 and 4th FET unit 8) of the SPDT switch and the receiving section (3rd FET unit 9 and 2nd FET unit 6) thereof are mutually the same in configuration. And none of adequate countermeasure is prepared at all to prevent the above-described fault caused at the time of transmitting a high-power radio frequency signal, so that some disadvantages are prone to occur in the SPDT switch including a distortion of the radio frequency signal, generation of an insertion loss (power loss) and deterioration of the isolation characteristic.
An improved SPDT switch is disclosed in a first reference by M. J. Schindler, et al., "A High Power 2-18 GHz T/R Switch", IEEE MTT-S Digest, 1990, pp. 453-456. In this cited reference, there are described some improvements including that the gate width of each field-effect transistor is optimized by taking into consideration the level difference between a transmission power and a reception power (i.e., the gate width of each transistor for passing a high-power radio frequency signal is widened so as to prevent a distortion of the radio frequency signal or an increase of the insertion loss), and also that dual-gate field-effect transistors are employed for enhancing the withstand voltage characteristic and isolation characteristic in an off-state.
However, the improvements achieved in the above cited reference include no contrivance relative to a case where a great power is inputted to the SPDT switch at the time of transmission. More specifically, there exists a problem that the isolation characteristic is prone to be deteriorated in the 2nd FET unit 6. Furthermore, the withstand voltage of a dual-gate FET is at most twice that of a single-gate FET, and it is impossible for the dual-gate FET to deal with a radio frequency signal of any greater power. Besides the above, the improvement attained in the isolation characteristic is at most twice or so. In addition, it is necessary to prepare a variety of field-effect transistors having different gate widths.
As mentioned above, the conventional SPDT switch or the one disclosed in the cited reference is not capable of dealing satisfactorily with a high-power radio frequency signal and is not adapted to realize desired characteristics with respect to the isolation and the insertion loss. And another problem is still existent with regard to complication and intricacy in both design and production due to an increase of the kinds of required field-effect transistors.